6 interrupt configuration register, 7 device interrupt pending register, Interrupt configuration register - 8 – Kontron VMP3 User Manual

Page 68: Device interrupt pending register - 8, Configuration vmp3

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Configuration

VMP3

Page 4 - 8

© 2005 Kontron Modular Computers GmbH

ID 29230, Rev. 01

29230

.01.UG.VC.050727/091435

P R E L I M I N A R Y

4.2.6

Interrupt Configuration Register

The interrupt configuration register acts as an interrupt enable register for the MC2, MC3 and
MC5 signals.

4.2.7

Device Interrupt Pending Register

The Device Interrupt Pending Register is used to identify the source of the pending interrupt
request of the following onboard devices:

• Temperature sensor (TEMP)
• Fast Ethernet PHY interrupt (FCC1 and FCC2)
• UARTs (SER1, SER2, SER3, and SER4)

Table 4-7: Interrupt Configuration Register

REGISTER NAME

INTERRUPT CONFIGURATION

ACCESS

ADDRESS

0xFFFF A005

R

W

BIT POSITION

MSB

7

6

5

4

3

2

1

0

LS

B

CONTENT

MC5_INT_

EN

MC3_INT_

EN

res.

MC2_INT_

EN

res.

res.

res.

res.

DEFAULT

0

0

n/a

0

n/a

n/a

n/a

n/a

BIT CONTENT

STATE

DESCRIPTION

0

reserved

0

1

1

reserved

0

1

2

reserved

0

1

3

reserved

0

1

4 MC2_INT_EN

0

Disabled

1

Enabled

5

reserved

0

1

6 MC3_INT_EN

0

Disabled

1

Enabled

7 MC5_INT_EN

0

Disabled

1

Enabled

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