Compaq 21264 - Manual (Page 138)

4–50 Cache and External Interfaces Alpha 21264/EV67 Hardware Reference Manual
Bcache Port
Ratio The number of GCLK cycles per peak Bcache bandwidth transfer. For example, a
ratio of 2.5 means the peak Bcache bandwidth is 16 bytes for every 2.5 GCLK
cycles.
rd_wr The minimum spacing required between the read and write indices at the data/tag
pins, expressed as GCLK cycles.
wr_rd The minimum spacing required between the write and read indices at the data/tag
pins, expressed as GCLK cycles.
Term Description