Compaq 21264 - Manual (Page 90)

4–2 Cache and External Interfaces Alpha 21264/EV67 Hardware Reference Manual
Introduction to the External Interfaces
• The Bcache interface includes a 128-bit bidirectional data bus, a 20-bit unidirec-
tional address bus, and several control signals.
– The BcDataOutClk_x[3:0] clocks are free-running and are derived from the
internal GCLK. The period of BcDataOutClk_x[3:0
] is a programmable mul-
tiple of GCLK.
– The Bcache turns the BcDataOutClk_x[3:0] clocks around and returns them
to the 21264/EV67 as BcDataInClk_H[7:0]. Likewise, BcTagOutClk_x
returns as BcTagInClk_H.
– The Bcache interface supports a 64-byte block size.
• The system interface includes a 64-bit bidirectional data bus, two 15-bit
unidirectional address buses, and several control signals.
– The SysAddOutClk_L clock is free-running and is derived from the internal
GCLK. The period of SysAddOutClk_L is a programmable multiple of
GCLK.
– The SysAddInClk_L clock is a turned-around copy of SysAddOutClk_L.
Figure 4–1 shows a simplified view of the external interface. The function and purpose
of each signal is described in Chapter 3.