Maxq family user’s guide: maxq8913 supplement – Maxim Integrated MAXQ Family Users Guide: MAXQ8913 Supplement User Manual
Page 66
MAXQ Family User’s Guide:
MAXQ8913 Supplement
19-4
Bit 7: Internal Reference OK (REFOK). This read-only status bit indicates whether the internal reference is ready for
use by the ADC.
0 = The internal reference is either disabled (IREFEN = 0) or is still warming up.
1 = The internal reference is ready for use.
Bit 6: ADC Start Conversion (ADCONV). Writing this bit to 1 starts the ADC conversion sequence. In single-conversion
mode, this bit is cleared automatically by hardware at the end of the conversion sequence. In continuous-conversion
mode, this bit remains set (and conversion continues) until it is reset to 0 by software. Setting this bit to 0 causes the
current conversion sequence to stop. If the ADC is in the middle of a conversion, it stops after that conversion has
completed. If the ADC is in the middle of an extended acquisition time period, it stops immediately.
Entering stop or PMM mode causes the current conversion to stop and the ADCONV bit to clear to 0. This bit cannot
be written to 1 (to start a conversion) in PMM mode unless switchback is enabled (SWB = 1).
Bit 5: ADC Data Available Interrupt Flag (ADDAI). This bit is set to 1 by hardware when the conditions defined by
ADINT[1:0] (ADCN[11:10]) are met. Setting this bit triggers an interrupt if ADDAIE = 1 and the interrupt is not otherwise
masked. This bit is cleared by hardware automatically when an ADC conversion is started (ADCONV is written to 1); it
can also be cleared to 0 by software.
Bit 4: ADC Conversion Configuration Register Select (ADCFG); Bits 3:0: ADC Configuration/Data Buffer Register
Index (ADIDX[3:0]). These register bits select the ADC configuration or ADC data buffer register that is accessed when
ADDATA is read or written. Note that the ADC data buffer registers are read-only.
Reading from or writing to ADDATA causes the value ADIDX[3:0] to autoincrement, but does not affect the value of
ADCFG, even if the ADIDX value rolls over from 1111b to 0000b. For example, setting ADCFG to 1 and ADIDX[3:0]
to 1101b selects ADCFG[5] for read/write access. Reading ADDATA successively then returns the values ADCFG[5],
ADCFG[6], ADCFG[7], ADCFG[0], ADCFG[1], and so on.
ADCFG
ADIDX3
ADIDX2
ADIDX1
ADIDX0
READING ADDATA
WRITING ADDATA
0
0
0
0
0
Reads ADBUF[0]
No effect
0
0
0
0
1
Reads ADBUF[1]
No effect
0
0
0
1
0
Reads ADBUF[2]
No effect
0
0
0
1
1
Reads ADBUF[3]
No effect
0
0
1
0
0
Reads ADBUF[4]
No effect
0
0
1
0
1
Reads ADBUF[5]
No effect
0
0
1
1
0
Reads ADBUF[6]
No effect
0
0
1
1
1
Reads ADBUF[7]
No effect
0
1
0
0
0
Reads ADBUF[8]
No effect
0
1
0
0
1
Reads ADBUF[9]
No effect
0
1
0
1
0
Reads ADBUF[10]
No effect
0
1
0
1
1
Reads ADBUF[11]
No effect
0
1
1
0
0
Reads ADBUF[12]
No effect
0
1
1
0
1
Reads ADBUF[13]
No effect
0
1
1
1
0
Reads ADBUF[14]
No effect
0
1
1
1
1
Reads ADBUF[15]
No effect
1
X
0
0
0
Reads ADCFG[0]
Writes to ADCFG[0]
1
X
0
0
1
Reads ADCFG[1]
Writes to ADCFG[1]
1
X
0
1
0
Reads ADCFG[2]
Writes to ADCFG[2]
1
X
0
1
1
Reads ADCFG[3]
Writes to ADCFG[3]
1
X
1
0
0
Reads ADCFG[4]
Writes to ADCFG[4]
1
X
1
0
1
Reads ADCFG[5]
Writes to ADCFG[5]
1
X
1
1
0
Reads ADCFG[6]
Writes to ADCFG[6]
1
X
1
1
1
Reads ADCFG[7]
Writes to ADCFG[7]
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