Maxim Integrated 73M1822/73M1922 Implementers Guide - Manual (Page 24)

73M1822/73M1922 Implementer’s Guide UG_1x22_052
24 Rev. 1.0
7 Register Summary
Address
(hex)
Default Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
01 00h/9Ch DSYEN NSLAVE2 NSLAVE1 NSLAVE0 MSIDEN MSID SCK32 Reserved
02 00h TMEN Reserved Reserved Reserved Reserved ENLPW SPOS HC
03 F0h GPIO7 GPIO6 GPIO5 GPIO4 RGMON DET SYNL RGDT
04 F7h DIR7 DIR6 DIR5 DIR4 REVHSD3 REVHSD2 REVHSD1 REVHSD0
05 0Bh ENGPIO7 ENGPIO6 ENGPIO5 ENGPIO4 ENAPOL ENDET ENSYNL ENRGDT
06 00h POL7 POL6 POL5 POL4 Reserved Reserved Reserved Reserved
07 00h Reserved Reserved Reserved Reserved DTST3 DTST2 DTST1 DTST0
08 DAh PSEQ7 PSEQ6 PSEQ5 PSEQ4 PSEQ3 PSEQ2 PSEQ1 PSEQ0
09 EFh PRST2 PRST1 PRST0 PDVSR4 PDVSR3 PDVSR2 PDVSR1 PDVSR0
0A 31h ICHP3 ICHP2 ICHP1 ICHP0 Reserved KVCOH2 KVCOH1 KVCOH0
0B 2Ah Reserved NDVSR6 NDVSR5 NDVSR4 NDVSR3 NDVSR2 NDVSR1 NDVSR0
0C 06h NSEQ7 NSEQ6 NSEQ5 NSEQ4 NSEQ3 NSEQ2 NSEQ1 NSEQ0
0D 42h LOKDET SLHS Reserved Reserved CHNGFS NRST2 NRST1 NRST0
0E 00h FRCVCO PWDNPLL Reserved Reserved Reserved Reserved RGTH1 RGTH0
0F 2Ch ENFEH PWDN SLEEP Reserved XIB1 XIB0 Reserved Reserved
10 00h Reserved Reserved Reserved CMVSEL CMTXG1 CMTXG0 CMRXG1 CMRXG0
12 00h OFH ENDC ENAC ENSHL
ENLVD
ENFEL ENDT ENNOM
13 00h DCIV1 DCIV0 ILM ACCEN PLDM OVDTH IDISPD1 IDISPD0
14 00h TXBST DAA1 DAA0 Reserved RXBST RLPNH RXG1 RXG0
15 00h Reserved DISNTR Reserved CIDM THEN ENUVD ENOVD ENOID
16 01h TXEN RXEN RLPNEN ATEN FSCTR3 FSCTR2 FSCTR1 FSCTR0
17 00h APWS Reserved Reserved ACZ1 ACZ0 Reserved Reserved Reserved
18 01h TEST3 TEST2 TEST1 TEST0 Reserved Reserved Reserved Reserved
19 00h POLL MATCH Reserved IDL2 INDX3 INDX2 INDX1 INDX0
1A 00h RNG7 RNG6 RNG5 RNG4 RNG3 RNG2 RNG1 RNG0
1B 00h LV7 LV6 LV5 LV4 LV3 LV2 LV1 Reserved
1C 00h LC6 LC5 LC4 LC3 LC2 LC1 LC0 Reserved
1D 90h REVLSD3 REVLSD2 REVLSD1 REVLSD0 Reserved Reserved Reserved Reserved
1E 00h ILMON UVDET OVDET OIDET SLLS Reserved Reserved Reserved
1F 00h POLVAL7 POLVAL6 POLVAL5 POLVAL4 POLVAL3 POLVAL2 POLVAL1 POLVAL0