Maxim Integrated 73M1822/73M1922 Implementers Guide User Manual

Page 3

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UG_1x22_052

73M1822/73M1922 Implementer’s Guide

Rev. 1.0

3

Table of Contents

1

Introduction ................................................................................................................................... 4

1.1

Procedure Conventions ............................................................................................................ 4

1.2

Read-Modify-Write Procedure .................................................................................................. 4

2

Hardware Requirements ................................................................................................................ 5

2.1

Reset ....................................................................................................................................... 5

2.2

Crystal Oscillator ...................................................................................................................... 5

2.3

MAFE Interface ........................................................................................................................ 5

2.4

Interrupts ................................................................................................................................. 5

3

Device Configuration and Initialization......................................................................................... 6

3.1

Host-Side Device (73M1902) Configuration .............................................................................. 6

3.1.1

Reset and Disable Interrupts ....................................................................................... 6

3.1.2

MAFE Interface Configuration ...................................................................................... 7

3.1.3

Clock and Sample Rate Management .......................................................................... 7

3.2

Line-Side Device (73M1912) Configuration .............................................................................. 8

3.2.1

Barrier Synchronization Recovery ................................................................................ 8

3.2.2

Initial Line State Configuration ................................................................................... 11

4

On-Hook Procedures ................................................................................................................... 13

4.1

CID Mode .............................................................................................................................. 13

4.2

Off-Hook Request .................................................................................................................. 14

4.3

Ring Detection and Line Voltage Reversal ............................................................................. 16

4.4

Line-in-use and Loss of Battery Feed ..................................................................................... 19

5

Off-Hook Procedures ................................................................................................................... 20

5.1

Barrier Synch Loss................................................................................................................. 20

5.2

On-hook Request ................................................................................................................... 20

5.3

Parallel Pickup Event Detection.............................................................................................. 20

6

Interrupt Processing .................................................................................................................... 21

6.1

GPIO Interrupt ....................................................................................................................... 21

6.2

DET Interrupt ......................................................................................................................... 22

6.3

SYNL Interrupt ....................................................................................................................... 22

6.4

RGDT and RGMON Interrupts ............................................................................................... 23

7

Register Summary ....................................................................................................................... 24

8

Related Documentation ............................................................................................................... 25

9

Contact Information ..................................................................................................................... 25

Revision History .................................................................................................................................. 26

Figures

Figure 1: Ring Detection

........................................................................................................................ 16

Figure 2 : Ring Circuit

............................................................................................................................ 16

Figure 4: Line Voltage Measurement Circuit

........................................................................................... 19

Figure 3 : Battery Feed and Line-in-Use Detection

................................................................................. 19


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