Create a simulation model for the checker, Compile and simulate the testbench – Altera CRC Compiler User Manual

Page 26

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3–10

Chapter 3: Functional Description

Running the Testbench Example

CRC Compiler User Guide

© November 2009

Altera Corporation

Preliminary

4. Click the Simulation tab and ensure that Generate Simulation Model is checked.

Click Finish to create the IPFS model for the CRC generator.

5. The generation window displays the files being generated and the generation

status. After the files are generated successfully, click Exit.

Create a Simulation Model for the Checker

1. Open the MegaWizard Plug-In Manager again (see Step 1 in the previous

section

“Create the Generator and Checker Files” on page 3–9

) to edit the CRC

checker wrapper file crcchk.v or crcchk.vhd, in the testbench directory.

2. Click Next to display the page from which you select the CRC checker wrapper

file, crcchk.v or crcchk.vhd.

3. After you select the crcchk.v or crcchk.vhd the file, click Next to continue.

1

You can review the parameters, but it is recommended that you don’t
change the settings.

4. Click the Simulation tab and ensure that Generate Simulation Model is checked.

5. Click Finish to create the IPFS model for the CRC checker.

Compile and Simulate the Testbench

In this section, you navigate the Quartus II software interface to compile and simulate
the testbench.

1. Using the Quartus II software, open the Assignments/EDA Tool Settings... menu,

then click the plus sign (+) to expand the EDA Tool Settings category and select
Simulation

to display the Quartus II Simulation page.

2. Set the Tool Name to the simulator of your choice. In this example, it is ModelSim-

Altera.

3. Click Compile test bench: in the NativeLink settings, then click Test Benches...

4. In the Test Benches page, click New...

5. In the New Test Bench Settings page, set Test bench name:, Test bench entity:, and

Instance:

all to tb. Set Run for: to 100 us. In the Test bench files, set File name: to

tb.v

or tb.vhd and then click Add.

6. Click OK to apply these settings. The Test Benches page displays the settings.

7. You can review the testbench settings. If these setting are correct, click OK to

confirm this is the testbench file and settings that you want to use.

8. Click OK to close the EDA Tools ->Simulation page.

9. Open the Tools->Options menu and select EDA Tool Options.

10. Double-click the simulator you chose in Step 1 and enter the path to the

executable. Click OK to close the EDA Tool Options page.

11. In the Quartus II Processing menu, select Start->Start Analysis & Elaboration.

After the testbench compiles successfully, a message displays telling you that the
compilation was successful and informs you of the number of warnings that exist.

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