Nco ip core architectures, Large rom architecture, Small rom architecture – Altera NCO MegaCore Function User Manual

Page 19: Nco ip core architectures -2, Large rom architecture -2, Small rom architecture -2

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where M is the accumulator precision and f

clk

is the clock frequency

The minimum possible output frequency waveform is generated for the case where ϕ

inc

= 1. This case is

also the smallest observable frequency at the output of the NCO, also known as the frequency resolution

of the NCO, f

res

given in Hz by the equation:

f

RES

= f

clk

/2M Hz

For example, if a 100 MHz clock drives an NCO with an accumulator precision of 32 bits, the frequency

resolution of the oscillator is 0.0233 Hz. For an output frequency of 6.25 MHz from this oscillator, you

should apply an input phase increment of:
(6.25 x 10

6

/100 x 10

6

) x 2

32

= 268435456

The NCO MegaCore function automatically calculates this value, using the specified parameters. IP

Toolbench also sets the value of the phase increment in all testbenches and vector source files it generates.
Similarly, the generated output frequency, f

FM

for a given frequency modulation increment, ϕ

FM

is

determined by the equation:
f

FM

= ϕ

FM

f

clk

/2

F

Hz

where F is the modulator resolution
The angular precision of an NCO is the phase angle precision before the polar-to-cartesian transforma‐

tion. The magnitude precision is the precision to which the sine and/or cosine of that phase angle can be

represented. The effects of reduction or augmentation of the angular, magnitude, accumulator precision

on the synthesized waveform vary across NCO architectures and for different f

o

/f

clk

ratios.

You can view these effects in the NCO time and frequency domain graphs as you change the NCO IP core

parameters.

NCO IP Core Architectures

The NCO MegaCore function supports large ROM, small ROM, CORDIC, and multiplier-based

architectures.

Large ROM Architecture

Use the large ROM architecture if your design requires very high speed sinusoidal waveforms and your

design can use large quantities of internal memory.
In this architecture, the ROM stores the full 360 degrees of both the sine and cosine waveforms. The

output of the phase accumulator addresses the ROM.
The internal memory holds all possible output values for a given angular and magnitude precision. The

generated waveform has the highest spectral purity for that parameter set (assuming no dithering). The

large ROM architecture also uses the fewest logic elements (LEs) for a given set of precision parameters.

Small ROM Architecture

To reduce LE usage and increase output frequency, use the small ROM architecture.
In a small ROM architecture, the device memory only stores 45 degrees of the sine and cosine waveforms.

All other output values are derived from these values based on the position of the rotating phasor on the

unit circle.

3-2

NCO IP Core Architectures

UG-NCO

2014.12.15

Altera Corporation

NCO IP Core Functional Description

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