Altera Reed-Solomon Compiler - Manual (Page 7)

Chapter 1: About This Compiler 1–3
Performance and Resource Utilization
December 2014 Altera Corporation Reed-Solomon Compiler
User Guide
Performance and Resource Utilization
Table 1–3 shows the typical performance using the Quartus II software for Stratix IV
(EP4SGX70DF29C2X) devices.
The throughput in megabits per second (Mbps) is derived from the formulas in
Table 3–9 on page 3–11 and maximum frequency at which the design can operate.
Stratix GX Final
Other device families No support
Table 1–2. Device Family Support (Part 2 of 2)
Device Family Support
Table 1–3. Performance—Stratix IV Devices
Parameters
ALUTs
Logic
Registers
Memory
f
MAX
(MHz)
Throughput
(Mbps)
Options Keysize
Bits
(1)
Symbols
(2)
Check
(3)
ALUTs M9K
Standard decoder Half 4 15 6 426 382 8 3 413 387
Standard decoder Half 8 204 16 1,220 1,034 64 3 368 2,945
Split bit error decoder Half 8 204 16 1,273 1,092 64 3 340 2,719
Full bit error decoder Half 8 204 16 1,255 1,092 64 3 325 2,603
Standard decoder Half 8 255 32 2,100 1,713 64 3 324 2,038
Variable decoder Half 8 204 16 1,362 1,119 64 3 356 2,850
Erasures decoder Half 8 204 16 2,170 1,596 64 3 314 2,510
Erasures and variable
decoder
Half 8 204 16 2,322 1,746 96 3 310 2,480
Standard encoder — 8 204 16 204 210 — — 620 4,960
Variable encoder — 8 204 16 777 313 — — 387 3,099
Variable encoder — 8 204 32 1,651 582 — — 347 2,775
Notes to Table 1–3 :
(1) The number of bits per symbol (m).
(2) The number of symbols per codeword (N).
(3) The number of check symbols per codeword (R).