Altera Stratix II GX Embedded Gigabit Ethernet MAC/PHY - Manual (Page 2)

Stratix II GX Embedded Gigabit Ethernet MAC / PHY
User's Guide
Version 1.0 - October 2005
Contents
1 DESIGN KIT INSTALLATION ......................................................................................................... 3
1.1 P LATFORM S PECIFIC JAVA R UNTIME I NSTALLATION ...................................................................... 3
1.2 D ESIGN K IT I NSTALLATION ............................................................................................................ 3
2 DESIGN FLOW................................................................................................................................ 4
3 GENERATING THE MAC/PHY CORE............................................................................................ 5
3.1 O VERVIEW ................................................................................................................................... 5
3.2 C ORE C ONFIGURATION O PTIONS .................................................................................................. 6
3.3 D ESIGN K IT D ATABASE ................................................................................................................. 7
3.4 S IMULATION E NVIRONMENT .......................................................................................................... 7
3.5 R UNNING S IMULATION U SING M ODELSIM SE ................................................................................. 8
Overview .......................................................................................................................................... 8
Testbuilder Options.......................................................................................................................... 9
3.6 R UNNING S IMULATION U SING M ODELSIM PE OR M ODELSIM AE.................................................... 13
Overview ........................................................................................................................................ 13
Simulation Options......................................................................................................................... 13
3.7 D ESIGN I MPLEMENTATION WITH Q UARTUS II ................................................................................ 16
3.8 VQM N ETLIST G ENERATION ....................................................................................................... 16
3.9 F ULL T IMING G ATE L EVEL S IMULATION ........................................................................................ 17
4 CONTACT ..................................................................................................................................... 18
List of Figures
Figure 1: Design Flow Overview ............................................................................................................. 5
Figure 2: MAC Core Configuration Panel ............................................................................................... 6
Figure 3: Testbench Setup Overview...................................................................................................... 8
Figure 4: Running Testbuilder Overview................................................................................................. 9
Figure 5: Testbuilder Panel ................................................................................................................... 10
Figure 6: VQM Netlist Generation ......................................................................................................... 17
List of Tables
Table 1: Core Configuration Options ...................................................................................................... 7
Table 2: Design Kit Directory Structure................................................................................................... 7
Table 3: Simulation Options .................................................................................................................. 10
Table 4: MAC Configuration Options .................................................................................................... 12
Table 5: Testbuilder Simulation Control................................................................................................ 13
Table 6: Simulation Options .................................................................................................................. 13
Table 7: MAC Configuration Options .................................................................................................... 15
2