Sundance SMT364 - Manual (Page 35)

Version 1.0 Page 35 of 37 SMT364 User Manual
Register 0xD – FPGA Global Reset.
By sending this control word, the FPGA gets reset. Every single register in the FPGA
is reset. The FPGA transmit that command to the:
- Clock synthesizers, which keep the internal register values but does not output
any signal,
- Clock multiplexers, which take there default state (external clocks routed to
ADCs)
- The interface implemented in the FPGA, including CommPort interface. It is
note recommended to proceed to an FPGA global reset while communications
are happening. It might stick the other end into an unknown state.
After a Reset command, the SMT364 expects receiving a dummy ComPort word (any
value) and sends one back containing the Firmware version number. It is a way of
checking that the firmware is latest and that the board is responding and ready to
work. The format of that ComPort word is as follow:
0xFF364Fxy, which means FPGA firmware version x.y
Bit
number
Description
Bit 31 1
Bit 30 1
Bit 29 0
Bit 28 1
Bit 27-0 Not Used.