Block diagram, Architecture description – Sundance SMT335E User Manual
Page 8
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Version 1.5
Page 8 of 53
SMT335E SMT375E User Manual
Block Diagram
Architecture Description
The SMT335E TIM consists of a Texas Instruments TMS320C6201 running at
200MHz while the SMT375E has a TMS320C6701 running at 166MHz. Modules are
populated with 512KB of synchronous burst SRAM (SBSRAM) and 16MB of
synchronous DRAM (SDRAM), giving a total memory capacity of 16.5MB.
A Field Programmable Gate Array (FPGA) is used to manage global bus accesses
and implement six communication ports and four Sundance Digital Buses.
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