Document Outline

• Contents
• List of Figures
• List of Tables
• Preparing and Installing the MVME2400-Series Module
  • Introduction
  • MVME240x Description
    • MVME240x Module
    • PMCspan Expansion Mezzanine
    • PCI Mezzanine Cards (PMCs)
    • VMEsystem Enclosure
    • System Console Terminal
  • Overview of Start-Up Procedures
  • Unpacking the MVME240x Hardware
  • Preparing the MVME240x Hardware
    • MVME240x
      • Setting the Flash Memory Bank A/Bank B Reset Vector Header (J8)
      • Setting the VMEbus System Controller Selection Header (J9)
      • Setting the General-Purpose Software-Readable Header (SRH) Switch(S3)
    • PMCs
    • PMCspan
    • System Console Terminal
  • Installing the MVME240x Hardware
    • ESD Precautions
    • PMCs
    • Primary PMCspan
    • Secondary PMCspan
    • MVME240x
    • Installation Considerations
• Operating Instructions
  • Introduction
  • Applying Power
  • MVME240x
    • Switches
      • ABT (S1)
    • Status Indicators
      • BFL (DS1)
      • CPU (DS2)
      • PMC2 (DS3)
      • PMC1 (DS4)
    • 10/100 BASET Port
      • RST (S2)
    • DEBUG Port
    • PMC Slots
      • PCI MEZZANINE CARD (PMC Slot 1)
      • PCI MEZZANINE CARD (PMC Slot 2)
  • PMCspan
• Functional Description
  • Introduction
  • Features
  • General Description
  • Block Diagram
    • MPC750 Processor
      • L2 Cache
    • Hawk System Memory Controller (SMC)/PCI Host Bridge (PHB) ASIC
      • PCI Bus Latency
      • PPC Bus Latency
      • Assumptions
      • Clock Ratios and Operating Frequencies
      • PPC60x Originated
      • PCI Originated
    • SDRAM Memory
      • SDRAM Latency
    • Flash Memory
      • ROM/Flash Performance
    • Ethernet Interface
    • PCI Mezzanine Card (PMC) Interface
      • PMC Slot 1 (Single-Width PMC)
      • PMC Slot 2 (Single-Width PMC)
      • PMC Slots 1 and 2 (Double-Width PMC)
      • PCI Expansion
    • VMEbus Interface
    • Asynchronous Debug Port
    • PCI-ISA Bridge (PIB) Controller
    • Real-Time Clock/NVRAM/Timer Function
    • PCI Host Bridge (PHB)
    • Interrupt Controller (MPIC)
    • Programmable Timers
      • Interval Timers
      • 16/32-Bit Timers
• Programming the MVME240x
  • Introduction
  • Memory Maps
    • Processor Bus Memory Map
      • Default Processor Memory Map
    • PCI Local Bus Memory Map
    • VMEbus Memory Map
  • Programming Considerations
    • PCI Arbitration
    • Interrupt Handling
    • DMA Channels
    • Sources of Reset
    • Endian Issues
      • Processor/Memory Domain
      • PCI Domain
      • VMEbus Domain
• PPCBug
  • PPCBug Overview
  • PPCBug Basics
    • Memory Requirements
    • PPCBug Implementation
  • MPU, Hardware, and Firmware Initialization
  • Using PPCBug
    • Debugger Commands
    • Diagnostic Tests
• Modifying the Environment
  • Overview
  • CNFG - Configure Board Information Block
  • ENV - Set Environment
    • Configuring the PPCBug Parameters
    • Configuring the VMEbus Interface
• Ordering Related Documentation
  • Motorola Computer Group Documents
  • Manufacturers’ Documents
  • Related Specifications
• Specifications
  • Specifications
  • Cooling Requirements
  • EMC Regulatory Compliance
• Connector Pin Assignments
  • Introduction
  • Pin Assignments
    • VMEbus Connector - P1
    • VMEbus Connector - P2
    • Serial Port Connector - DEBUG (J2)
    • Ethernet Connector - 10BASET (J3)
    • CPU Debug Connector - J1
    • PCI Expansion Connector - J6
    • PCI Mezzanine Card Connectors - J11 through J14
    • PCI Mezzanine Card Connectors - J21 through J24
• Troubleshooting the MVME240x
  • Solving Startup Problems
  • Abbreviations, Acronyms, and Terms to Know
• Glossary
• Index