Motorola SSETM 5000 - Manual (Page 34)

November 11, 2004 6881094C12-A
2-12 Theory of Operation: Transceiver Board
control IC (PCIC) that senses the output of a directional coupler and adjusts PA control voltages to
maintain a constant power level. The signal passes through a dual antenna switch and harmonic
filters to the antenna or to the remote RF port.
Figure 2-6. Transmitter Block Diagram
2.4.3.1 Power Distribution
To minimize voltage drop to the power amplifiers, net RAWB+ connects to power module Q107 and
the second stage of driver amplifier U102 through components having minimal series resistance—
ferrite beads and chokes only. During receive, no RF or DC bias is applied, and leakage current
through U102 and Q107 is less than 100 microamps.
At the rated transmitter power of 5 Watts, the radio consumes approximately 1800 mA, and at the
rated transmitter power of 2 Watts the radio consumes approximately 1100 mA.
2.4.3.2 Driver Amplifier
The driver amplifier IC (U102) contains two LDMOS FET amplifier stages and two internal resistor
bias networks. Pin 16 is the RF input. Modulated RF from the FGU, at a level of +3 dBm ±2 dB, is
coupled through a DC blocking capacitor to the gate of FET-1. An LC interstage matching network
connects the first stage output VD1 to the second stage input G2. The RF output from the drain of
FET-2 is pin 6 (RFOUT1). Gain control is provided by a voltage applied to pin 1 (VCNTRL). Typical
output power is about +27 dBm (500 mW) with VCNTRL at 5.0 V.
L109 and C113 are the interstage matching network. Components L105 and C110 match the output
impedance to 50 ohms; capacitor C107 is a DC block.
2.4.3.3 Power Amplifier Transistor Q107
The power amplifier transistor, Q107, is an LDMOS FET housed in a high-power, surface-mount, ring
package. To prevent thermal damage, it is essential that the heat sink of the power module be held in
place against the radio chassis. The input impedance-matching network uses discrete inductors and
capacitors. The low-pass output matching network uses both transmission lines and lumped LCs.
Drain bias is applied through E101 and L101. Gain is dynamically controlled by adjusting the gate
bias. The gate is insulated from the drain and source so that gate bias current is essentially zero.
The input impedance-matching network is L106, L107, C108, and C109. A transmission-line
structure and C137, C111, L110 and C112 form the output-matching network. Gate bias is applied
through R105 and L108.
Modulated RF
from FGU
Driver
amplifier
Power
amplifier Directional
coupler
Dual
Antenna
switch
Harmonic
filters
Antenna
Forward power detector
Vd = m*sqrt(P) + b
RFIN
INT
PCIC
MAEPF-27408-O
To
Remote
RF
RX
V
V V
V V