Z/architecture – IBM z/OS User Manual

Page 5

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5

z/Architecture

The zSeries is based on the z/Architecture

, which is

designed to reduce bottlenecks associated with the lack

of addressable memory and automatically directs resources

to priority work through Intelligent Resource Director. The

z/Architecture is a 64-bit superset of ESA/390.

z/Architecture is implemented on the z990 to allow full

64-bit real and virtual storage support. A maximum 256

GB of real storage is available on z990 servers. z990 can

defi ne any LPAR as having 31-bit or 64-bit addressability.

z/Architecture has:

• 64-bit general registers.

• New 64-bit integer instructions. Most ESA/390 architec-

ture instructions with 32-bit operands have new 64-bit

and 32- to 64-bit analogs.

• 64-bit addressing is supported for both operands

and instructions for both real addressing and virtual

addressing.

• 64-bit address generation. z/Architecture provides 64-bit

virtual addressing in an address space, and 64-bit real

addressing.

• 64-bit control registers. z/Architecture control registers

can specify regions, segments, or can force virtual

addresses to be treated as real addresses.

• The prefi x area is expanded from 4K to 8K bytes.

• New instructions provide quad-word storage consistency.

• The 64-bit I/O architecture allows CCW indirect data

addressing to designate data addresses above 2 GB for

both format-0 and format-1 CCWs.

• IEEE Floating Point architecture adds twelve new instruc-

tions for 64-bit integer conversion.

• The 64-bit SIE architecture allows a z/Architecture server

to support both ESA/390 (31-bit) and z/Architecture

(64-bit) guests. Zone Relocation is expanded to 64-bit

for LPAR and z/VM

®

.

• 64-bit operands and general registers are used for all

Cryptographic instructions

• The implementation of 64-bit z/Architecture can help

reduce problems associated with lack of addressable

memory by making the addressing capability virtually

unlimited (16 Exabytes).

z/Architecture Operating System Support

The z/Architecture is a tri-modal architecture capable of

executing in 24-bit, 31-bit, or 64-bit addressing modes.

Operating systems and middleware products have been

modifi ed to exploit the new capabilities of the z/Architecture.

Immediate benefi t can be realized by the elimination of the

overhead of Central Storage to Expanded Storage page

movement and the relief provided for those constrained by

the 2 GB real storage limit of ESA/390. Application programs

can run unmodifi ed on the zSeries family of servers.

Expanded Storage (ES) is still supported for operating sys-

tems running in ESA/390 mode (31-bit). For z/Architecture

mode (64-bit), ES is supported by z/VM. ES is not supported

by z/OS in z/Architecture mode.

Although z/OS does not support Expanded Storage when

running under the new architecture, all of the Hiperspace

and VIO APIs, as well as the Move Page (MVPG) instruc-

tion, continue to operate in a compatible manner. There is

no need to change products that use Hiperspaces.

Some of the exploiters of z/Architecture for z/OS include:

• DB2 Universal Database

Server for z/OS

• IMS

• Virtual Storage Access Method (VSAM)

• Remote Dual Copy (XRC)

• Tape and DASD access method

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