Index, Numerics – IBM 990 User Manual
Page 277
© Copyright IBM Corp. 2003, 2004. All rights reserved.
265
Index
Numerics
1000BASE-T Ethernet 11
16-port ESCON feature 93
50.0 micron 100–101
62.5 micron 98, 100–101
A
A Frame 33
architecture modes 68
B
connectivity 33
jumper 30
replacement 33
Branch History Table (BHT) 44
C
cages 33
Capacity Backup 65
Capacity BackUp (CBU) 15–16, 65, 190, 206, 208–209
Capacity Upgrade on Demand (CUoD) 15–16, 55,
189–190
for I/O 195
for memory 193
for processors 191
activation 208
deactivation 208
testing 209
CEC cage 3, 8, 24, 33, 75, 80–81
Central Processor (CP) 47
pool 47
central storage 55
CF
mode 69
structure duplexing 170
CFCC 47
enhanced patch apply 162
CFLEVEL 163
CHA 182
channel spanning 114
channel sparing 95
Channel Subsystem (CSS) 6, 61, 71, 109–110, 179,
182–184
Checksum Offload 103
CHPID 7, 59, 79, 110
CHPID Mapping Tool (CMT) 7, 79, 84, 89, 114, 116
CIU 15–16, 189
registration 197
CMT 7, 79, 84, 89, 114, 116
compatibility support for z/OS 134
Compression Unit 43
concurrent channel upgrades 71
concurrent conditioning 196
Concurrent Processor Unit 6, 47, 62, 64
concurrent upgrade 15, 46, 188, 210
Configuration Management 116
Configurator for e-business 115
connectors 92
Control for Plan-Ahead 196
cooling 25
Coupling Facility (CF)
mode 69
CP 47
CP Assist for Cryptographic 12
CP Cryptographic Assist Facility 43
CPACF 122
CPU
Cryptographic 12
asynchronous function 120
function support 120
processors 122
synchronous function 120
ID 61, 110
Image ID 110
priority 183–184
priority queueing 179, 182
for memory 193
for processors 191
CUoDCUoD
for I/O 195
Customer Initiated Upgrade (CIU) 15–16, 189
enablement feature 196, 202
registration 197
D
Data Encryption Standard (DES) 120
DCA 25, 76
DCM 182
DES 120
director port cards 182
disruptive upgrades 217
Distributed Converter Assembly (DCA) 25, 76
dual processor design 42