IBM 990 - Manual (Page 279)

Index 267
LICCC 6
Linux 47, 60
Integrated Facilities for Linux 47
mode 69
storage 69
Linux on zSeries 19, 147
logical book structure 39
Logical Channel Subsystem (LCSS) 3, 61, 72, 110, 115
Logical Processor 58
LPAR 182–183
cluster 178–179
CPU management 15, 179
mode 47, 60
single storage pool 55
weights 180
LSPR 224
LSPR workloads for z990 226
M
managed channels 182
master key entry 123
MBA 24, 31, 40, 77
MCM 35
MCM technology 6
MCP 100–101
memory 6
allocation 54
cards 27
upgrade 27
Memory Bus Adapter
see MBA 24
Memory Coherent Controller 39
Message authentication code (MAC) 120
Message Time Ordering 159
MIF 111, 113
ID 61, 111, 113
mode conditioner patch (MCP) 100–101
model downgrades 5
model number 4
model upgrade paths 5
model upgrades 189
modes of operation 56
Modular Refrigeration Unit 25
Motor Drive Assembly 26
Motor Scroll Assembly 26
MSU 66
MSU value 66
Multiple Image Facility (MIF) 111
Multiple Logical Channel Subsystems 110
N
N+1 power supply 25
nondisruptive upgrades 211, 217
O
On/Off Capacity Upgrade on Demand (On/Off CoD) 16
On/Off CoD 189, 202
active CP 203
active ICF 203
active IFL 203
active zAAP 203
enablement feature 202
Optica Technologies 85
OSA-2
FDDI 12
FENET 102
Token Ring 85
OSA-Express 10
1000BASE-T 84, 101
ATM 12, 85
Fast Ethernet 84, 102
GbE 84, 100
GbE LX 100
GbE SX 100
Gigabit Ethernet 11
Integrated Console Controller 11, 102
Token Ring 84, 103
OSA-ICC 11, 102
P
Parallel channel 12, 84
Parallel Sysplex 13
Partition Number 111
PCHID 7, 59, 72, 79, 86, 113, 116
PCI Cryptographic Accelerator 38, 108, 122
feature 12
PCI Cryptographic Coprocessor 85
PCI X-Cryptographic Coprocessor 13
PCICA 12, 35, 85, 108, 122, 125–126, 211
PCICC 85
PCIX Cryptographic Coprocessor 38, 108, 122
PCIXCC 13, 61, 85, 108, 122, 211
feature 125
Performance 17
performance 183
Physical Channel ID 113
physical channel path identifiers 116
Plan-Ahead 191, 196
Plan-ahead Concurrent Conditioning for I/O 196
Planned upgrades 189
Power 25
Power and cooling requirement 232
PR/SM 4, 54, 57
Pricing MSUs 66
Processor Unit (PU) 6, 24, 46, 52, 54
processor weighting 179
PU 6, 24, 46, 52, 54
characterization 60
chip 36
conversions 64
sparing 47
Public Key Algorithm 120
Q
QDIO 103