Panasonic MN101C00 User Manual
Page 102
(4) Timer 5 mode register (TM5MD)
Figure 4-9-16 Timer 5 Mode Register (TM5MD: X'03F88', R/W)
Chapter 4 Timer Functions
88
Timer Function Control Registers
TM5CK3
X
0
TM5CK2
0
1
1
fs/4
(Use Prohibited)
Output of time base timer
Timer 5 clock source selection
fosc
0
0
1
1
(Use Prohibited)
Synchronous time base timer output
0
1
TM5CK1
TM5IR1
0
0
1
0
0
1
1/2
7
of the clock source
1/2
8
of the clock source
1/2
9
of the clock source
1/2
10
of the clock source
1/2
13
of the clock source
1
x
x
1
Time base timer
interrupt period selection
TM5IR0
0
1
2
4
5
6
7
3
(at reset: 0XXXXXX0)
TM5MD
TM5CK0
TM5IR2
0
TM5CLRS
TM5CK1
TM5CK2
TM5CK3
TM5IR0
TM5IR1
TM5IR2
TM5CLRS
0
1
fosc
Time base timer
clock source selection
TM5CK0
Binary counter 5
clear selection flag
Disable initialization of
TM5BC during a write to TM5OC
1
∗
If TM5CLRS=0, TM5IRQ is disabled.
Enable initialization of
TM5BC during a write to TM5OC
(Use Prohibited) fx *
* 48QFH package only