Panasonic MN101C00 - Manual (Page 17)

Chapter 1 Overview
3
Hardware Functions
1-2 Hardware Functions
ROM/RAM Size: <Single chip mode>
Internal ROM ∗ 2 16,384
×
8-bit* 3
Internal RAM ∗ 2 512
×
8-bit
Machine Cycles: High speed mode 0.10µs/20MHz (4.5V to 5.5V)
0.25µs/8MHz(2.7V to 5.5V)
1.00µs/2MHz(2.0V to 5.5V)
Low speed mode 125µs/32KHz(2.0V to 5.5V)* 4
Interrupts: 12 interrupts(11 interrupts except for 48-pin QFH package)
<External interrupts>
The active edge can be selected for all external interrupts
IRQ0 External interrupt (can be connected to noise filter)
IRQ1 External interrupt (can determine zero crossings, can be
connected to noise filter)
IRQ2 External interrupt
IRQ3 External interrupt * 4
<Timer interrupts>
TM2IRQ Timer 2 (8-bit timer)
TM3IRQ Timer 3 (8-bit timer)
TM4IRQ Timer 4 (16-bit timer)
TM5IRQ Timer 5 (8-bit timer)
TBIRQ Clock timer interrupts
<Serial communication interrupt>
SC0IRQ Serial 0 (synchronous + simple UART
<A/D conversion complete interrupt>
ADIRQ A/D conversion complete
<Watchdog timer interrupt>
NMI Overflow of watchdog timer
Timer/Counters:five timers, all can generate interrupts
Timer 2 8-bit timer
Square wave output, 8-bit PWM output are possible,
Clock source: fs, fs/4, fx* 4 , TM2IO pin input
Timer 3 8-bit timer
Square wave output, synchronous serial/UART baud rate
timer
Clock source: fosc, fs/4, fs/16, TM3IO pin input
Remote control carrier can be generated.
∗ 2 Differs depending upon the
model.
[ ☞ 1-1-2 "Product Summary"]
*3 Bit 8 of the last address for
the built-in ROM of MN101C11X
is an optional bit; therefore, this
cannot be used as an ordinary
ROM.
*4 Exclusive for a 48-pin QFH
product.