Panasonic MN101C00 - Manual (Page 90)

Chapter 4 Timer Functions
76
8-bit Timer Operation (timers 2, 3)
4-4 8-bit Timer Operation (timer 5)
4-4-1 Overview
Timer 5 is an 8-bit timer that can have fosc, fs/4, fx, or time base output as
its clock source.
4-4-2 Operation
■ Timer Operation
Settings for timer operation are listed below.
(1) Set the TM5CLRS flag of the timer 5 mode register (TM5MD) to "0."
(2) Use the TM5CK3 to 1 flags of the TM5MD register to select fosc, fs/4, fx,
synchronized fx, time base timer output, or time base timer synchronized output as
the clock source.
(3) Set a value in compare register 5 (TM5OC). At this time, if the TM5CLRS flag is
"0," binary counter 5 will be initialized to X'00'.
(4) Binary counter 5 (TM5OC) counts upward from X'00'.
(5) When the value of binary counter 5 matches that of the TM5OC register, the timer 5
interrupt request flag is set, the binary counter is reset to X'00', and counting begins
again.
If the TM5CLRS flag of the TM5MD register is set to "0," binary
counter 5 will be initialized every time data in the TM5OC register is
overwritten. Timer 5 interrupts are disabled in this mode. If timer 5
interrupts are to be used, the TM5CLRS flag must be reset to "1"
after writing to the TM5OC register.
Timer 5 operation cannot be halted.
When servicing an interrupt, reset
the timer 5 interrupt request flag
before starting timer 5.
When choosing either time base
timer output or time base timer
synchronized output for the timer 5
clock source, the time base must
be set up.
During a count operation, be
careful if the value set in TM5OC
is smaller than the value of binary
counter 5, since the count-up
operation will continue until
overflow occurs.
If fx input is selected as the clock
source and the value of binary
counter 5 is to be read during
operation, select synchronized fx
input to avoid reading data that
may be incomplete during count-
up transitions. However, with
synchronized fx input, it is not
possible to return from
STOP/HALT modes.