Ni pxie-8105, Description, Functional overview – National Instruments NI PXIe-8105 User Manual

Page 10: Ni pxie-8105 functional description, Ni pxie-8105 -2, Description -2 functional overview -2, Ni pxie-8105 functional description -2

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Chapter 1

Introduction

NI PXIe-8105 User Manual

1-2

ni.com

Not only are the trigger bus, 10 MHz system reference clock, and star
trigger bus available in PXI retained by PXI Express, but new timing and
synchronization features that include a 100 MHz differential system
reference clock for the synchronization of multiple modules and three
differential star trigger buses for the distribution of precise clock and trigger
signals have been added. Differential timing and synchronization signals
provide PXI Express systems with increased noise immunity and the ability
to transmit clock signals at higher frequencies.

NI PXIe-8105

Description

The NI PXIe-8105 PXI Express/CompactPCI Express embedded computer
is a high-performance PXI Express/CompactPCI Express-compatible
system controller. The NI PXIe-8105 controller integrates standard I/O
features in a single unit by using state-of-the-art packaging. Combining an
NI PXIe-8105 embedded controller with a PXI Express-compatible
chassis, such as the PXIe-1062Q, results in a fully PC-compatible computer
in a compact, rugged package.

The standard I/O on each module includes DVI-I video, one RS-232 serial
port, a parallel port, four high-speed USB 2.0 ports, a PCI-based GPIB
controller, Gigabit Ethernet, a reset button, and a PXI trigger.

The NI PXIe-8105 has an Intel Core Duo processor T2500
(Dual Core 2.0 GHz), 667 MHz FSB, all the standard I/O, and a 60 GB
(or larger) hard drive. It also has an ExpressCard/34 expansion slot.

Functional Overview

This section contains functional descriptions of each major logic block on
the NI PXIe-8105 embedded computer.

NI PXIe-8105 Functional Description

The NI PXIe-8105 is a modular PC in a PXI Express 3U-size form factor.
Figure 1-1 is a functional block diagram of the NI PXIe-8105.
Following the diagram is a description of each logic block shown.

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