2 clock settings, 1 main system clock setting – NEC V850/SF1 User Manual

Page 20

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CHAPTER 2 NAMES AND FUNCTIONS OF COMPONENTS

User’s Manual U15447EJ1V0UM

20

2.2

Clock Settings

This section describes the clock settings.

For the position of the JP1 and JP2 in the IE-703079-MC-EM1, refer to Figure 2-1.

For the jumper switch position in the IE-703002-MC, refer to the IE-703002-MC User’s Manual (U11595E).

2.2.1 Main system clock setting

Table 2-1. Main System Clock Setting

IE-703079-MC-EM1 Setting

IE-703002-MC Setting

Emulator Use

Environment

Clock Supply

Method

JP1

JP2

SW1

SW2

JP2

When using

emulator as

standalone unit

Internal clock

OFF

1

7

8

2

When using

emulator with

target system

Internal clock

ON

Caution Emulation cannot be performed by inputting a clock from the target board.

The specifications of JP1 are as follows.

1

7

1

7

1

2

3

1

2

3

GND

1 M

GND

V850/SF1

I/O chip

X1

X2

1

10 pF

16 MHz

7

10 pF

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