NEC V850/SF1 - Manual (Page 29)

CHAPTER 5 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT
User’s Manual U15447EJ1V0UM
29
Figure 5-1. Equivalent Circuit of Emulation Circuit (1/5)
P00/NMI
Probe side IE system side
PD70F3079Y
QS3125
IN/OUT
P01/INTP0
P02/INTP1
P03/INTP2
P04/INTP3
P05/INTP4/ADTRG
P06/INTP5
P07/INTP6
IN/OUT
IN/OUT
P10/SI0/SDA0
P11/SO0
P12/SCK0/SCL0
P13/SI1/RXD0
P14/SO1/TXD0
P15/SCK1/ASCK0
IN/OUT
P20/SI3/RXD1
P21/SO3/TXD1
P22/SCK3/ASCK1
P23/SI4
P24/SO4
P25/SCK4
P26
P27
(P00/NMI)
P40/AD0
P41/AD1
P42/AD2
P43/AD3
P44/AD4
P45/AD5
P46/AD6
P47/AD7
PD70F3079Y
QS3384
OUT
IN
P30/TI2/TO2
P31/TI3/TO3
P32/TI4/TO4
P33/TI5/TO5
P34/VM45/TI71
IN/OUT
PD703091R
FPGA
OR2T40A
IN/OUT
QS3384 Connector
74VHC125
(AD7 to AD0)
(P47 to P40)
µ
µ
µ