Multiprocessor code generation, Shared memory architecture, Multiprocessor code generation -43 – National Instruments AutoCode NI MATRIX User Manual

Page 151: Shared memory architecture -43

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Chapter 5

Generated Code Architecture

© National Instruments Corporation

5-43

AutoCode Reference

Algebraic loops are not supported.

AutoCode only performs a single initialization pass at time = 0.0. This
corresponds to the SystemBuild Simulation options of

INITMODE=0

or

ACTIMING

.

Multiprocessor Code Generation

Generation for a multiprocessor target is supported by AutoCode by
heavily relying on a specialized template to generate a framework for the
target. For the most part, generating for multiple processors does not affect
the generated code within subsystems. However, the major differences start
to appear when handling the data for subsystem interfaces, %vars, Variable
Blocks, and asynchronous procedures.

Note

A multiprocessor template is not provided in the AutoCode distribution.

Shared Memory Architecture

In a multiprocessor system, subsystems are distributed across difference
processors. These subsystems must pass signals between each other and
can share common external inputs. Default AutoCode multiprocessor code
generation assumes a shared memory architecture and assumes all system
and subsystem external inputs and outputs are within a single data structure
named mbuf. Data included in this structure includes external system
input, external system output, data stores, and double-buffered subsystem
outputs. Subsystem inputs are handled indirectly because of the double
buffering.

Example 5-19 shows the sample and hold phase of subsystem 1.

Example 5-19

Sample and Hold Phase of Subsystem 1

subsys_1_in.throttle = ss5_outr->throttle;

subsys_1_in.Brake = mbuf->sys_extin.Brake;

subsys_1_in.PDown = mbuf->sys_extin.PDown;

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