National Instruments AutoCode NI MATRIX User Manual
Page 216
Chapter 8
AutoCode Sim Cdelay Scheduler
8-6
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triggers/enables have gone high are queued for execution. Then, in stage D,
ATR tasks whose output posting times have arrived and ANC tasks that
have just been queued for execution in stage C are marked for output
posting, which is stage E.
1, 2
Datastores are written from external inputs in
stage F (overwriting any previous values for that cycle). Finally, in stage G,
queued tasks are dispatched for execution.
Figure 8-3. Scheduler Pipeline Stages in the Standard AutoCode Scheduler
Given this flow, you now can explain why the delays are present for the
triggered and enabled subsystems. Take the case of the triggered subsystem
first. When the triggered task’s trigger input is posted high at 0.6 sec, the
1
Notice that in the standard template, certain loops internal to a stage have been lifted to include two or three stages—for
example, stages D, E, and F.
2
Any DataStores driven by task outputs are written to during this cycle.
Reset DataStore
Writers to Low
Priority
Read External
Inputs
Queue Tasks
Identify Outputs
to Post
Post Outputs
Write DataStores
from External
Inputs
Dispatch Tasks
A
B
C
D
E
F
G