National Instruments NI-VXI User Manual

Page 136

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Glossary

© National Instruments Corporation

G-13

NI-VXI User Manual

signal

Any communication between message-based devices consisting of a
write to a Signal register. Sending a signal requires that the sending
device have VMEbus master capability.

signed integer

n bit pattern, interpreted such that the range is from -2

(n-1)

to

+2

(n-1)

-1.

slave

A functional part of a MXI/VME/VXIbus device that detects data
transfer cycles initiated by a VMEbus master and responds to the
transfers when the address specifies one of the device’s registers.

SMP

See Shared Memory Protocol.

SRQ

Service Request

status/ID

A value returned during an IACK cycle. In VME, usually an 8-bit
value which is either a status/data value or a vector/ID value used by
the processor to determine the source. In VXI, a 16-bit value used as a
data; the lower 8 bits form the VXI logical address of the interrupting
device and the upper 8 bits specify the reason for interrupting.

STST

START/STOP trigger protocol; a one-line, multiple-device protocol
that can be sourced only by the VXI Slot 0 device and sensed by any
other device on the VXI backplane.

supervisory access

One of the defined types of VMEbus data transfers; indicated by
certain address modifier codes.

synchronous

A communications system that follows the command/response cycle

communications

model. In this model, a device issues a command to another device;
the second device executes the command and then returns a response.
Synchronous commands are executed in the order they are received.

SYNC Protocol

The most basic trigger protocol, simply a pulse of a minimum duration
on any one of the trigger lines.

SYSFAIL*

A VMEbus signal that is used by a device to indicate an internal
failure. A failed device asserts this line. In VXI, a device that fails
also clears its PASSed bit in its Status register.

SYSRESET*

A VMEbus signal that is used by a device to indicate a system reset or
power-up condition.

system clock driver

A VMEbus functional module that provides a 16 MHz timing signal on
the utility bus.

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