National Instruments NI PXIe-6672 User Manual
Page 55
Index
© National Instruments Corporation
I-3
N
National Instruments support and
NI PXI-6653, parts locator diagram, 3-3
NI PXI-665x
configuration, 2-2
connectors, 3-5
functional overview, 3-5
installation
O
operating environment specifications, A-6
P
PFI
PFI <0..5> connector
description, 3-5
location (diagram), 3-3
signal description (table), 3-6
PFI <0..5> signals
asynchronous routing, 3-16
front panel PFIs as inputs, 3-12
front panel triggers as outputs, 3-13
specifications, A-3
using front panel PFIs as inputs, 3-12
using front panel PFIs as outputs, 3-13
PFI synchronization clock
possible sources, 3-13
using front panel PFIs as outputs, 3-13
phase-locked loop. See PLL
physical specifications, A-5
PLL
Active LED, 3-4
routing from the CLKIN connector, 3-5
using the PXI_CLK10 PLL, 3-19
power requirement specifications, A-6
programmable function interface. See PFI
programming examples (NI resources), B-1
PXI backplane clock, 3-8
PXI star trigger bus. See PXI_STAR <0..12>
PXI star triggers, front panel triggers as
PXI trigger bus. See PXI_TRIG <0..7>
PXI triggers
front panel triggers as outputs, 3-13
PXI_CLK10
Active LED, 3-4
clock generation, 3-8
DDS phase-lock, 3-6
front panel triggers as outputs, 3-13
using front panel PFIs as outputs, 3-13
using the PXI triggers, 3-14
using the PXI_CLK10 PLL, 3-19
PXI_CLK10 and TCXO, 3-8
PXI_CLK10 phase
PXI_CLK10_IN
routing from the CLKIN connector, 3-5
signal description (table), 3-6
PXI_CLK10_OUT
signal description (table), 3-6
PXI_STAR <0..12>
asynchronous routing, 3-16
signal description (table), 3-6
specifications, A-4
using front panel PFIs as outputs, 3-13
using the PXI star triggers, 3-15
using the PXI triggers, 3-14
PXI_TRIG <0..7>
asynchronous routing, 3-16
signal description (table), 3-6
specifications, A-5
using front panel PFIs as outputs, 3-13
using the PXI star triggers, 3-15
using the PXI triggers, 3-14