1 module id and revision register (midr), Section 4.1 – Texas Instruments TMS320C6455 User Manual
Page 39
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DDR2 Memory Controller Registers
4.1
Module ID and Revision Register (MIDR)
The Module ID and Revision register (MIDR) is shown in
and described in
Figure 19. Module ID and Revision Register (MIDR)
31
30
29
16
Reserved
MOD_ID
R-0x0
R-0x0031
15
8
7
0
MJ_REV
MN_REV
R-0x03
R-0x0F
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 18. Module ID and Revision Register (MIDR) Field Descriptions
Bit
Field
Value
Description
31-30
Reserved
Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
29-16
MOD_ID
Module ID bits.
15-8
MJ_REV
Major revision.
7-0
MN_REV
Minor revision.
39
SPRU970G
–
December 2005
–
Revised June 2011
C6455/C6454 DDR2 Memory Controller
Copyright
©
2005
–
2011, Texas Instruments Incorporated
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