Xilinx ML403 User Manual
Page 11
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ML403 Board Information
XAPP979 (v1.0) February 26, 2007
11
R
If additional IIC devices are connected to the bus via the expansion header as shown in
Figure 13
, insert additional pull-up resistors on the external signals connected at pins 31 and
32. The resistor values are dependent on the voltage.
Figure 13: Expansion Header
NC
FPGA_PROM_CPLD_TM
S
FPGA_PROM_CPLD_TCK
EXPAN
S
ION_TDO
CPLD_TDO
GPIO_LED_N
GPIO_
S
W_N
GPIO_LED_C
GPIO_
S
W_C
GPIO_LED_W
GPIO_
S
W_W
GPIO_LED_
S
GPIO_
S
W_
S
GPIO_LED_E
GPIO_
S
W_E
GPIO_LED_0
GPIO_LED_1
GPIO_LED_2
GPIO_LED_
3
NC
NC
10
11
12
1
3
14
15
16
17
1
8
1
2
3
4
5
6
7
8
9
19
20
21
22
2
3
24
25
26
27
2
8
29
3
0
3
1
3
2
IIC_
S
CL
VCC2V5
Level
Tr
a
n
s
l
a
tion
MO
S
FET
s
Extern
a
l p
u
ll
u
p
s
connect here
Intern
a
l p
u
ll
u
p
s
connect here
IIC_
S
DA
NC
HDR 1 X
3
2
J
3
X979_1
3
_012
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