Xilinx ML403 - Manual (Page 14)

ML403 Board Information
XAPP979 (v1.0) February 26, 2007 www.xilinx.com 14
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3. Invoke XMD and connect to the MicroBlaze processor by the following command:
xmd -opt xapp.opt
4. Download the executable by the following command
dow <path>/executable.elf
Executing the Reference System from EDK
To execute the system using EDK, follow these steps:
1. Open system.xmp inside EDK.
2. Use Hardware
→
Generate Bitstream to generate a bitstream
3. Download the bitstream to the board using Device Configuration
→
Download
Bitstream.
4. Invoke XMD with Debug Launch XMD.
5. Download the executable by the following command.
dow <path>/executable.elf
Verifying the Reference Design with Xilinx Microprocessor Debugger
After downloading the bitstream file, issue the following XMD commands to verify that the
ML403 reference design is set up correctly.
mrd 0x42600100 8
The expected value of the control register after a reset, located at 0x42600100 is 0x00000000.
The expected value of the status register, located at 0x42600104, is 0x000000C0. The reset
values of the Transmit and Receive FIFO registers are indeterminate. The reset values of the
Transmit and Receive FIFO Occupancy and the Address registers is 0.
Except for the Status, , Receive FIFO, and Transmit and Receive Occupancy registers, all
registers are writeable.
mwr 0x42600100 0xFFFFFFFF
mrd 0x42600100 1
Using XMD commands, verify that the OPB IIC registers can be written and read as defined in
Tables 2-5.
Software Projects
The reference system contains the following software projects. In each software project
directory, there is a
src sub-directory for the source code. The connections in Figure 9 are
used for the eeprom, low_level_eeprom, dynamic_eeprom, and low_level_dynamic_eeprom
projects. These projects interface to the 24LC04. The connections in
Figure 3 are used for the
mult_master and repeated_start project. These projects interface to the IIC Bus via the
Aardvark Adapter.
Projects interfacing to Microchip 24LC04
eeprom: This project transmits and receives data using the high level (L1) software driver. The
OPB IIC is the master and the 24LC04 is configured as the slave. The OPB IIC master writes
data into the 24LC04 and reads it back.
low_level_eeprom: This project transmits and receives data using the low level (L0) software
driver. The OPB IIC is the master and the 24LC04 is configured as the slave. The OPB IIC
master writes data into the 24LC04 and reads it back. This is a polled mode example.
dynamic_eeprom: This project transmits and receives data using the high level (L1) software
driver. The OPB IIC is the master and the 24LC04 is configured as the slave. The OPB IIC
master writes data into the 24LC04 and reads it back.