Rainbow Electronics MAX6871 User Manual

Page 21

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Table 11 only applies to PO2 of the MAX6870. Write a 0
to a bit to make the PO2 output independent of the
respective signal (IN1–IN6 primary or secondary

thresholds, WDI1 or WDI2, GPI1–GPI4, MR, or other
programmable outputs).

MAX6870/MAX6871

EEPROM-Programmable Hex/Quad

Power-Supply Sequencers/Supervisors with ADC

______________________________________________________________________________________

21

Table 11. PO2 (MAX6870 Only) Output Dependency

REGISTER

ADDRESS

EEPROM

MEMORY

ADDRESS

BIT

OUTPUT ASSERTION CONDITIONS

[0]

1 = PO2 assertion depends on IN1 primary undervoltage threshold (Table 2).

[1]

1 = PO2 assertion depends on IN2 primary undervoltage threshold (Table 3).

[2]

1 = PO2 assertion depends on IN3 primary undervoltage threshold (Table 4).

[3]

1 = PO2 assertion depends on IN4 primary undervoltage threshold (Table 4).

[4]

1 = PO2 assertion depends on IN5 primary undervoltage threshold (Table 4).

[5]

1 = PO2 assertion depends on IN6 primary undervoltage threshold (Table 4).

[6]

1 = PO2 assertion depends on watchdog 1 (Tables 27 and 28).

12h

8012h

[7]

1 = PO2 assertion depends on watchdog 2 (Tables 27 and 28).

[0]

1 = P O2 asser ti on d ep end s on IN 1 second ar y und er vol tag e/over vol tag e thr eshol d ( Tab l e 2) .

[1]

1 = P O2 asser ti on d ep end s on IN 2 second ar y und er vol tag e/over vol tag e thr eshol d ( Tab l e 3) .

[2]

1 = P O2 asser ti on d ep end s on IN 3 second ar y und er vol tag e/over vol tag e thr eshol d ( Tab l e 4) .

[3]

1 = P O2 asser ti on d ep end s on IN 4 second ar y und er vol tag e/over vol tag e thr eshol d ( Tab l e 4) .

[4]

1 = P O2 asser ti on d ep end s on IN 5 second ar y und er vol tag e/over vol tag e thr eshol d ( Tab l e 4) .

[5]

1 = P O2 asser ti on d ep end s on IN 6 second ar y und er vol tag e/over vol tag e thr eshol d ( Tab l e 4) .

[6]

1 = PO2 assertion depends on GPI1 (Table 6).

13h

8013h

[7]

1 = PO2 assertion depends on GPI2 (Table 6).

[0]

1 = PO2 assertion depends on GPI3 (Table 6).

[1]

1 = PO2 assertion depends on GPI4 (Table 6).

[2]

1 = PO2 assertion depends on PO1 (Table 10).

[3]

1 = PO2 assertion depends on PO3 (Tables 12 and 13).

[4]

1 = PO2 assertion depends on PO4 (Tables 14 and 15).

[5]

1 = PO2 assertion depends on PO5 (Tables 16 and 17).

[6]

1 = PO2 assertion depends on PO6 (Tables 18 and 19).

14h

8014h

[7]

1 = PO2 assertion depends on PO7 (Table 20).

15h

8015h

[0]

1 = PO2 assertion depends on PO8 (Table 21).

40h

8040h

[1]

1 = PO2 asserts when MR = low (Table 7).

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