Table 26. register map (continued) – Rainbow Electronics MAX6871 User Manual

Page 41

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MAX6870/MAX6871

EEPROM-Programmable Hex/Quad

Power-Supply Sequencers/Supervisors with ADC

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41

Table 26. Register Map (continued)

REGISTER

ADDRESS

EEPROM

MEMORY

ADDRESS

READ/

WRITE

DESCRIPTION

2Dh

802Dh

R/W

PO6 (MAX6870)/PO4 (MAX6871) input selection—Product 1 (Table 18).

2Eh

802Eh

R/W

PO6 (MAX6870)/PO4 (MAX6871) input selection—Product 2 (Table 19).

2Fh

802Fh

R/W

PO6 (MAX6870)/PO4 (MAX6871) input selection—Product 2 (Table 19).

30h

8030h

R/W

PO6 (MAX6870)/PO4 (MAX6871) input selection—Product 2 (Table 19).

31h

8031h

R/W

PO6 (MAX6870)/PO4 (MAX6871) input selection—Products 1 and 2, reset timeout period,
and output type selection (Tables 18, 23, 24, and 25).

32h

8032h

R/W

PO7 (MAX6870)/PO5 (MAX6871) input selection (Table 20).

33h

8033h

R/W

PO7 (MAX6870)/PO5 (MAX6871) input selection (Table 20).

34h

8034h

R/W

PO7 (MAX6870)/PO5 (MAX6871) input selection (Table 20).

35h

8035h

R/W

PO7 (MAX6870)/PO5 (MAX6871) input selection, PO_ timeout period, and output type
selection (Tables 20, 23, 24, and 25).

36h

8036h

R/W

PO8 (MAX6870 only) input selection (Table 21).

37h

8037h

R/W

PO8 (MAX6870 only) input selection (Table 21).

38h

8038h

R/W

PO8 (MAX6870 only) input selection (Table 21).

39h

8039h

R/W

PO8 (MAX6870 only) input selection, PO_ timeout period, and output type selection.
(Tables 21, 23, 24, and 25).

3Ah

803Ah

R/W

Programmable output polarity (active-high/active-low) (Table 22).

3Bh

803Bh

R/W

GPI_ input polarity, PO5, PO6 (Tables 6, 17, and 19).

3Ch

803Ch

R/W

WDI1 input selection and timeout enable (Table 27).

3Dh

803Dh

R/W

WDI1 initial and normal timeout duration (Table 28).

3Eh

803Eh

R/W

WDI2 input selection and timeout enable (Table 27).

3Fh

803Fh

R/W

WDI2 initial and normal timeout duration (Table 28).

40h

8040h

R/W

MR input and programmable output behavior (Table 7).

41h

8041h

R/W

MARGIN and programmable output behavior (Table 8).

42h

8042h

R/W

Programmable output state with MARGIN assertion (Table 8).

43h

8043h

R/W

User EEPROM write disable (Table 31).

44h

8044h

R/W

Internal/external reference selection (Table 9).

45h

8045h

R/W

Configuration lock (Table 30).

46h

8046h

Reserved. Should not be overwritten.

47h

8047h

Reserved. Should not be overwritten.

48h

8048h

Reserved. Should not be overwritten.

49h

8049h

Reserved. Should not be overwritten.

4Ah

804Ah

Reserved. Should not be overwritten.

4Bh

804Bh

Reserved. Should not be overwritten.

4Ch

804Ch

Reserved. Should not be overwritten.

4Dh

804Dh

Reserved. Should not be overwritten.

4Eh

804Eh

Reserved. Should not be overwritten.

4Fh

804Fh

Reserved. Should not be overwritten.

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