Rainbow Electronics MAX6871 - Manual (Page 36)

MAX6870/MAX6871
SA7 through SA4 represent the standard interface
address (1010) for devices with EEPROM. SA3 and SA2
correspond to the A1 and A0 address inputs of the
MAX6870/MAX6871 (hard-wired as logic-low or logic-
high). SA0 is a read/write flag bit (0 = write, 1 = read).
The A0 and A1 address inputs allow up to four
MAX6870/MAX6871 devices to connect to one bus.
Connect A0 and A1 to GND or to the serial interface
power supply (see Figure 6).
Send Byte
The send byte protocol allows the master device to send
one byte of data to the slave device (see Figure 7). The
send byte presets a register pointer address for a sub-
sequent read or write. The slave sends a NACK instead
of an ACK if the master tries to send an address that is
not allowed. If the master sends 80h, 81h, or 82h, the
data is ACK. This could be start of the write byte/word
protocol, and the slave expects at least one further
data byte. If the master sends a stop condition, the
internal address pointer does not change. If the master
sends 84h, this signifies that the block read protocol is
expected, and a repeated start condition should follow.
The device reboots if the master sends 88h. The send
byte procedure follows:
1) The master sends a start condition.
2) The master sends the 7-bit slave address and a
write bit (low).
3) The addressed slave asserts an ACK on SDA.
4) The master sends an 8-bit data byte.
5) The addressed slave asserts an ACK on SDA.
6) The master sends a stop condition.
Write Byte/Word
The write byte/word protocol allows the master device
to write a single byte in the register bank, preset an
EEPROM (configuration or user) address for a subse-
quent read, or to write a single byte to the configuration
or user EEPROM (see Figure 7). The write byte/word
procedure follows:
1) The master sends a start condition.
2) The master sends the 7-bit slave address and a
write bit (low).
3) The addressed slave asserts an ACK on SDA.
4) The master sends an 8-bit command code.
5) The addressed slave asserts an ACK on SDA.
6) The master sends an 8-bit data byte.
7) The addressed slave asserts an ACK on SDA.
8) The master sends a stop condition or sends another
8-bit data byte.
9) The addressed slave asserts an ACK on SDA.
10) The master sends a stop condition.
To write a single byte to the register bank, only the 8-bit
command code and a single 8-bit data byte are sent.
The command code must be in the range of 00h to 45h.
The data byte is written to the register bank if the com-
mand code is valid. The slave generates a NACK at
step 5 if the command code is invalid.
To preset an EEPROM (configuration or user) address
for a subsequent read, the 8-bit command code and a
single 8-bit data byte are sent. The command code
must be 80h if the write is to be directed into the config-
uration EEPROM, or 81h or 82h, if the write is to be
EEPROM-Programmable Hex/Quad
Power-Supply Sequencers/Supervisors with ADC
36 ______________________________________________________________________________________
SDA
SCL
1
MSB LSB START
0 1 0 A1 A0 X R/W ACK
Figure 6. Slave Address