Rainbow Electronics DS2181A - Manual (Page 16)

DS2181A
041995 16/32
TRANSMIT MULTIFRAME BOUNDARY TIMING Figure 13
TIMESLOT 30
TCLK
TMSYNC 1 ,
TFSYNC
TMO 1
TCHCLK
TAF 2
TSER
TPOS 3
TNEG
TIMESLOT 31 TIMESLOT 0
FRAME 15 FRAME 0
FRAME 15 FRAME 0
TIMESLOT 31 TIMESLOT 0
MSB LSB LSB MSB
LSB MSB LSB MSB
NOTES:
1. Low-high transitions on TMSYNC and/or TFSYNC must occur one TCLK period early with respect to actual
frame and multiframe boundaries. TMO follows the rising edge of TMSYNC or TFSYNC.
2. TAF transitions on true frame boundaries.
3. Delay from TSER to TPOS, TNEG is five TCLK periods.