Teledyne LeCroy QPHY-DDR3 - Manual (Page 33)

QPHY-DDR3 Software Option
917717 Rev C
33
CAS Write Latency
Allows the user to specify the CAS Write Latency (CWL) used to define tCK(avg) limits (see tables 61 to
64 in JEDEC Standard).
Speed Bin
Allows the user to specify the Speed Bin used to define tCK(avg) limits (see tables 61 to 64 in JEDEC
Standard).