IEI Integration NANO-LX v1.10 - Manual (Page 23)

NANO-LX EPIC SBC
1.2.2 Technical Specifications:
NANO-LX SBC technical specifications are listed in Table 1-1. Detailed descriptions of
each specification can be found in Chapter 2.
SPECIFICATION
CPUs Supported AMD® Geode™ LX800
Cache Memory 64K I/ 64k D L1 cache, 128K L2 cache
System Chipset AMD® CS5536
I/O Controller AMD® CS5536
Memory One 200-pin DDR 333/400MHz SO-DIMM SDRAM with a
maximum size of 1GB.
PCI Bus Interface Revision 2.2
Super IO W83627EHG
Display CRT integrated in AMD® Geode™ LX800
TTL/ LVDS 24 bit TTL integrated in AMD® LX 800 18 bit LVDS
HDD Interface One IDE channel supports two Ultra ATA 100/66/33
devices
Power Support AT/ATX power support
Power Consumption +12V @ 0.92A (DDR400 256MB)
Power Management Supports Advanced Configuration and Power Interface
(ACPI) Specifications Revision 2.0
Watchdog Timer Software programmable supports 1~255 sec. system
reset
I/O Interfaces 1 x FDD
1 x LPT
1 x CFII
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