Figure 3-15: pci-104 connector location – IEI Integration NANO-PV-D4252_N4552_D5252 User Manual

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NANO-PV-D4252/N4552/D5252 EPIC SBC

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Figure 3-15: PCI-104 Connector Location

Pin

Row A

Row B

Row C

Row D

1

GND/5 V

TBD1

5 V

AD00

2 VI/O1 AD02 AD01 +5

V

3 AD05 GND AD04 AD03

4 C/BE0#

AD07 GND AD06

5 GND AD09 AD08 GND

6 AD11 VI/O2 AD10 M66EN

7 AD14 AD13 GND AD12

8

+3.3 V

C/BE1#

AD15

+3.3 V

9 SERR#

GND SB0# PAR

10 GND

PERR# +3.3

V SDONE

11 STOP# +3.3

V LOCK# GND

12 +3.3

V TRDY# GND

DEVSEL#

13 FRAME#

GND

IRDY# +3.3

V

14 GND

AD16 +3.3

V C/BE2#

15

AD18 +3.3

V

AD17 GND

16

AD21 AD20 GND AD19

17

+3.3

V

AD23 AD22 +3.3

V

18 IDSEL0 GND

IDSEL1 IDSEL2

19 AD24 C/BE3# VI/O1 IDSEL3

20

GND AD26 AD25 GND

21

AD29 +5

V AD28 AD27

22 +5

V AD30 GND

AD31

23 REQ0# GND

REQ1# VI/O2

24 GND

REQ2# +5

V GNT0#

25 GNT1# VI/O3 GNT2# GND

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