Cirrus Logic CS4270 - Manual (Page 15)

DS686F1 15
CS4270
Figure 4. Master Mode, Left-Justified SAI Figure 5. Slave Mode, Left-Justified SAI
SCLK output
SDOUT
LRCK output
MSB MSB-1 MSB-2 MSB-3
t mslr
t sdo
LRCK input
SCLK input
SDOUT MSB
t stp thld
t sclkl t sclkh
MSB-1
t slrd
SCLK output
SDOUT
LRCK output
MSB MSB-1 MSB-2 MSB-3
tsdo
tmslr
LRCK input
SCLK input
SDOUT
tstp thld
tsclkl tsclkh
MSB
t slrd
Figure 6. Master Mode, I²S SAI Figure 7. Slave Mode, I²S SAI
sdis
t
SCLK
SDIN
sdih
t
sclkw
t
Figure 8. Master and Slave Mode, SCLK/SDIN