Cirrus Logic CS42L52 - Manual (Page 43)

DS680F2 43
CS42L52
3/1/13
input path. The PGAxSEL bits may be used to isolate the input signal(s) from the PGA outputs. When
the PGA is powered down, no input should be selected. Refer to
“ADC Input Select” on page 48 and
“PGA Input Mapping” on page 49 for the required settings.
6.2.3 Power Down ADCx
Configures the power state of ADC channel x.
Notes:
1. The CS42L52 employs a scheme for controlling the power to the ADC when PASSTHRU
(
“Passthrough Analog” on page 52 ) and PDN_OVRD ( “Power Down ADC Override” on page 43 ) are
enabled. Refer to the referenced application.
6.2.4 Power Down
Configures the power state of the entire CODEC.
6.3 Power Control 2 (Address 03h)
6.3.1 Power Down ADC Override
Configures an override of the power down control for ADCx.
6.3.2 Power Down MICx
Configures the power state of the microphone pre-amplifier for channel x.
6.3.3 Power Down MIC Bias
Configures the power state of the microphone bias circuit.
PDN_ADCx ADC Status
0 Powered Up
1 Powered Down
Application “Analog In to Analog Out Passthrough” on page 31
PDN CODEC Status
0 Powered Up
1 Powered Down
7 6 5 4 3 2 1 0
Reserved Reserved Reserved OVRDB OVRDA PDN_MICB PDN_MICA PDN_BIAS
OVRDx PDN_ADC Override
0 Disable
1 Enable
Application “Analog In to Analog Out Passthrough” on page 31
PDN_MICx MIC Pre-Amp Status
0 Powered Up
1 Powered Down
Application “MIC Inputs” on page 26
PDN_BIAS MIC Bias Status
0 Powered Up
1 Powered Down