Cirrus Logic CS42L52 - Manual (Page 50)

50 DS680F2
CS42L52
3/1/13
6.10 ADC HPF Corner Frequency (Address 0Bh)
6.10.1 HPF x Corner Frequency
Sets the corner frequency (-3 dB point) for the internal High-Pass Filter (HPF).
6.11 Misc. ADC Control (Address 0Ch)
6.11.1 Analog Front-End Volume Setting B=A
Configures independent or ganged volume control and muting of the analog front end.
6.11.2 Digital MUX
Selects the signal source for the ADC serial port
6.11.3 Digital Sum
Configures a mix/swap of ADCA and ADCB.
7 6 5 4 3 2 1 0
Reserved Reserved Reserved Reserved HPFB_CF1 HPFB_CF0 HPFA_CF1 HPFA_CF0
HPFx_CF[1:0] HPF Corner Frequency Setting (Fs=48 kHz)
00 Normal setting as specified in “ADC Digital Filter Characteristics” on page 14
01 119 Hz
10 236 Hz
11 464 Hz
7 6 5 4 3 2 1 0
ADCB=A DIGMUX DIGSUM1 DIGSUM0 INV_ADCB INV_ADCA ADCBMUTE ADCAMUTE
ADCB=A Single Volume Control Affected Volume Controls
0 Disabled ADCxVOL[7:0] ( “ADCx Volume” on page 57 ),
ADCxMUTE ( “ADC Mute” on page 51 ),
ALC and Limiter Attack/Release ( page 66 to page 68 )
MICxGAIN[4:0] ( “MICx Gain” on page 55 ),
PGAxVOL[5:0] ( “PGAx Volume” on page 56 ),
PASSxVOL[7:0] ( “Passthrough x Volume” on page 57 )
1 Enabled
DIGMUX SDOUT Signal Source
0 ADC
1 DSP
DIGSUM[1:0]
Serial Output Signal
Left Channel Right Channel
00 ADCA ADCB
01 (ADCA + ADCB)/2 (ADCA + ADCB)/2
10 (ADCA - ADCB)/2 (ADCA - ADCB)/2
11 ADCB ADCA