Table 13. atapi decode, Figure 11. atapi block diagram, Cs4392 – Cirrus Logic CS4392 User Manual

Page 21

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background image

CS4392

DS459PP3

21

ATAPI4

ATAPI3

ATAPI2

ATAPI1

ATAPI0

AOUTA

AOUTB

0

0

0

0

0

MUTE

MUTE

0

0

0

0

1

MUTE

bR

0

0

0

1

0

MUTE

bL

0

0

0

1

1

MUTE

b[(L+R)/2]

0

0

1

0

0

aR

MUTE

0

0

1

0

1

aR

bR

0

0

1

1

0

aR

bL

0

0

1

1

1

aR

b[(L+R)/2]

0

1

0

0

0

aL

MUTE

0

1

0

0

1

aL

bR

0

1

0

1

0

aL

bL

0

1

0

1

1

aL

b[(L+R)/2]

0

1

1

0

0

a[(L+R)/2]

MUTE

0

1

1

0

1

a[(L+R)/2]

bR

0

1

1

1

0

a[(L+R)/2]

bL

0

1

1

1

1

a[(L+R)/2]

b[(L+R)/2]

1

0

0

0

0

MUTE

MUTE

1

0

0

0

1

MUTE

bR

1

0

0

1

0

MUTE

bL

1

0

0

1

1

MUTE

[(bL+aR)/2]

1

0

1

0

0

aR

MUTE

1

0

1

0

1

aR

bR

1

0

1

1

0

aR

bL

1

0

1

1

1

aR

[(aL+bR)/2]

1

1

0

0

0

aL

MUTE

1

1

0

0

1

aL

bR

1

1

0

1

0

aL

bL

1

1

0

1

1

aL

[(aL+bR)/2]

1

1

1

0

0

[(aL+bR)/2]

MUTE

1

1

1

0

1

[(aL+bR)/2]

bR

1

1

1

1

0

[(bL+aR)/2]

bL

1

1

1

1

1

[(aL+bR)/2]

[(aL+bR)/2]

Table 13. ATAPI Decode

Σ

Σ

A Channel

Volume

Control

AoutA

AoutB

Left Channel

Audio Data

Right Channel

Audio Data

B Channel

Volume

Control

MUTE

MUTE

Figure 11. ATAPI Block Diagram

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