3 register maps tab, Figure 3. register maps tab - cs43l21, Figure 3.register maps tab - cs43l21 – Cirrus Logic CDB43L21 User Manual
Page 10: Section 2.3, Cdb43l21
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DS723DB1
CDB43L21
2.3
Register Maps Tab
The Advanced Register Debug tab provides low-level control of the CS43L21 individual register settings.
Register values can be modified bit-wise or byte-wise. For bit-wise, click the appropriate push-button for the
desired bit. For byte-wise, the desired hex value can be typed directly into the register address box in the
register map. The “FPGA” and “GPIO” tabs may be ignored.
Figure 3. Register Maps Tab - CS43L21
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