Cirrus Logic CDB43L21 - Manual (Page 2)

2 DS723DB1
CDB43L21
TABLE OF CONTENTS
1. SYSTEM OVERVIEW ............................................................................................................................. 4
1.1 Power ............................................................................................................................................... 4
1.2 Grounding and Power Supply Decoupling ....................................................................................... 4
1.3 FPGA ............................................................................................................................................... 4
1.4 CS43L21 .......................................................................................................................................... 4
1.5 CS8415 Digital Audio Receiver ........................................................................................................ 5
1.6 Oscillator .......................................................................................................................................... 5
1.7 I/O Stake Headers ........................................................................................................................... 5
1.8 Analog Outputs ................................................................................................................................ 5
1.9 Stand-Alone Switches ...................................................................................................................... 6
1.10 Control Port Connectors ................................................................................................................ 6
1.10.1 USB Connector ..................................................................................................................... 6
1.10.2 RS-232 Connector ................................................................................................................. 6
2. SOFTWARE MODE CONTROL ............................................................................................................. 7
2.1 General Configuration Tab ............................................................................................................... 8
2.2 DAC Volume Controls Tab ............................................................................................................... 9
2.3 Register Maps Tab ......................................................................................................................... 10
3. HARDWARE MODE CONTROL .......................................................................................................... 11
3.1 FPGA H/W Control ......................................................................................................................... 11
3.2 CS43L21 H/W Control ................................................................................................................... 11
4. SYSTEM CONNECTIONS .................................................................................................................... 14
5. JUMPER SETTINGS ............................................................................................................................ 14
6. CDB43L21 BLOCK DIAGRAM ............................................................................................................ 15
7. CS43L21 SCHEMATICS ...................................................................................................................... 16
8. CDB43L21 LAYOUT ............................................................................................................................ 22
9. ERRATA ............................................................................................................................................... 25
10. REVISION HISTORY .......................................................................................................................... 25
1. SYSTEM OVERVIEW ............................................................................................................................. 4
1.1 Power ............................................................................................................................................... 4
1.2 Grounding and Power Supply Decoupling ....................................................................................... 4
1.3 FPGA ............................................................................................................................................... 4
1.4 CS43L21 .......................................................................................................................................... 4
1.5 CS8415 Digital Audio Receiver ........................................................................................................ 5
1.6 Oscillator .......................................................................................................................................... 5
1.7 I/O Stake Headers ........................................................................................................................... 5
1.8 Analog Outputs ................................................................................................................................ 5
1.9 Stand-Alone Switches ...................................................................................................................... 6
1.10 Control Port Connectors ................................................................................................................ 6
1.10.1 USB Connector ..................................................................................................................... 6
1.10.2 RS-232 Connector ................................................................................................................. 6
2. SOFTWARE MODE CONTROL ............................................................................................................. 7
2.1 General Configuration Tab ............................................................................................................... 8
2.2 DAC Volume Controls Tab ............................................................................................................... 9
2.3 Register Maps Tab ......................................................................................................................... 10
3. HARDWARE MODE CONTROL .......................................................................................................... 11
3.1 FPGA H/W Control ......................................................................................................................... 11
3.2 CS43L21 H/W Control ................................................................................................................... 11
4. SYSTEM CONNECTIONS .................................................................................................................... 14
5. JUMPER SETTINGS ............................................................................................................................ 14
6. CDB43L21 BLOCK DIAGRAM ............................................................................................................ 15
7. CS43L21 SCHEMATICS ...................................................................................................................... 16
8. CDB43L21 LAYOUT ............................................................................................................................ 22