DS72
3DB1
15
CDB43L21
6. CDB43L21 BLOCK DIAGRAM
Figure 9. Block Diagram
Analog Output
(Line + Headphone)
Software Mode
Control Port
CS43L21
S/PDIF Input
(CS8415)
Clocks/Data Header
I²C/SPI Header
FPGA
Oscillator
(socket)
Reset
MCLK
Hardware Mode
Switches