Research & development, 3 spi interface – INFICON Spot CDS550D User Manual

Page 6

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Research & Development

SPOT CDS500D & CDS550D OEM Sensor SPI-Interface Specification_V1.1

Page 6 of 14

Christian Berg, T based on Felix Mullis, TL

Created 11/10/2014 2:36:00 PM

2.5.3 SPI Interface

2.5.3.1 SPI Parameters:

Parameter Description

Setting

CPOL

Clock Polarity

0, Clock Idle low

CPHA

Clock Phase

1, Transmit data on leading edge, read data on falling edge

Mode

SPI Mode

1 (CPOL = 0, CPHA = 1)

DORD

Bit sequence order

0, MSB first



2.5.3.2 SPI Write


2.5.3.3 SPI Read


2.5.3.4 SPI Timing

Name

Symbol

Value

Unit

Clock frequency

fSPI-bus

17

MHz

Clock pulse high-state

tpwh

30

ns

Clock pulse low-state

tpwl

30

ns

SS/ (SSN) to valid latch

tsussn

8

ns

SS/ (SSN) minimal pulse length between write cycles

tpwssn

30

ns

Data setup time

tsud

6

ns

Data hold time

thd

4

ns

Data valid after clock

tvd

26

ns

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