Rockwell Automation MPP Processor Moduile - Manual (Page 11)

MPP October 2005 – Issue 6 11
Triguard SC300E MPP Processor Module
THEORY OF OPERATION
SC300E system overview
A block diagram showing the signal flow between the main functional areas of the MPP is
shown in Figure 2-3 . External communication is via the chassis backplane wiring as
summarised in Figure 2-1 .
All SC300E input and output modules interface to three isolated I/O communications buses
(shown collectively as the Processor-I/O Bus in Figure 2-1 ), each being controlled by one of
the MPPs.
At the input modules, field signals are filtered and then split, via isolating circuitry, into three
identical, signal processing paths. Each path is controlled by a microcontroller that
coordinates signal path processing, testing and signal status reporting to its respective MPP,
via one of the I/O communications buses.
Each of the MPPs communicates with its neighbours via read only, serial communications
links (Figure 2-4 ).
Figure 2-4 Read serial communications only links
The MPPs synchronise at least once per application logic execution cycle, and each reads the
input, output and diagnostic status of its neighbours. Each MPP correlates and corrects its
memory image of the current state of the system using a 2-oo-3 software vote, logging any
discrepancies found in a local diagnostic history table.
Each MPP then executes its programmed application logic and sets its respective outputs, via
the I/O communications bus, to the required state.