Pci library hardware api – Comtrol eCos User Manual
Page 449

Chapter 30. The eCos PCI Library
number will be incremented as new busses are discovered. If successful,
true
is returned. Otherwise,
false
is
returned.
cyg_bool cyg_pci_translate_interrupt( cyg_pci_device *dev_info,
CYG_ADDRWORD *vec );
Translate the device’s PCI interrupt (INTA#-INTD#) to the associated HAL vector. This may also depend on which
slot the device occupies. If the device may generate interrupts, the translated vector number will be stored in
vec
and the result is
true
. Otherwise the result is
false
.
cyg_bool cyg_pci_allocate_memory( cyg_pci_device *dev_info,
cyg_uint32 bar,
CYG_PCI_ADDRESS64 *base );
cyg_bool cyg_pci_allocate_io( cyg_pci_device *dev_info,
cyg_uint32 bar,
CYG_PCI_ADDRESS32 *base );
These routines allocate memory or I/O space to the base address register indicated by
bar
. The base address in
*base
will be correctly aligned and the address of the next free location will be written back into it if the allocation
succeeds. If the base address register is of the wrong type for this allocation, or
dev_info
does not contain valid
base_size[]
entries, the result is
false
. These functions allow a device driver to set up its own mappings if it
wants. Most devices should probably use
cyg_pci_configure_device()
.
void cyg_pci_set_memory_base( CYG_PCI_ADDRESS64 base );
void cyg_pci_set_io_base( CYG_PCI_ADDRESS32 base );
These routines set the base addresses for memory and I/O mappings to be used by the memory allocation routines.
Normally these base addresses will be set to default values based on the platform. These routines allow these to be
changed by application code if necessary.
PCI Library Hardware API
This API is used by the PCI library to access the PCI bus configuration space. Although it should not normally
be necessary, this API may also be used by device driver or application code to perform PCI bus operations not
supported by the PCI library.
void cyg_pcihw_init(void);
Initialize the PCI hardware so that the configuration space may be accessed.
void cyg_pcihw_read_config_uint8(
cyg_uint8 bus,
cyg_uint8 devfn, cyg_uint8 offset, cyg_uint8 *val);
void cyg_pcihw_read_config_uint16( cyg_uint8 bus,
cyg_uint8 devfn, cyg_uint8 offset, cyg_uint16 *val);
void cyg_pcihw_read_config_uint32( cyg_uint8 bus,
cyg_uint8 devfn, cyg_uint8 offset, cyg_uint32 *val);
These functions read a register of the appropriate size from the PCI configuration space at an address composed
from the
bus
,
devfn
and
offset
arguments.
void cyg_pcihw_write_config_uint8(
cyg_uint8 bus,
cyg_uint8 devfn, cyg_uint8 offset, cyg_uint8 val);
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