C.2.1 battery backup circuit – Digi JACKRABBIT BL1800 User Manual

Page 87

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User’s Manual

83

C.2.1 Battery Backup Circuit

Figure C-5 shows the Jackrabbit battery backup circuitry.

Figure C-5. Jackrabbit Battery Backup Circuit

Resistor R12, shown in Figure C-5, is typically not stuffed on the Jackrabbit board.
VRAM and Vcc are equal when power is supplied to the Jackrabbit. R13 prevents any cat-
astrophic failure of Q1 from allowing unlimited current to enter the soldered-in battery.

Resistors R14 and R15 make up a voltage divider between the battery voltage and the tem-
perature-compensation voltage at the anode of diode D80. This voltage divider biases the
base of Q1 to about 2.6 V. V

BE

on Q1 is about 0.55 V. Therefore, VRAM is about 2.05 V.

These voltages vary with temperature. VRAM varies the least because temperature-com-
pensation diodes D80–D82 will offset the variation with temperature of Q1 V

BE

. R80–

R82 may be stuffed instead of the corresponding D80–D82 to provide the optimum tem-
perature compensation.

Resistor R10 provides a minimum load to the regulator circuit.

MMBT5088LT1

Q1

R12

0 W

R15

R10

4.3 MW

3 V

VBAT

R13

1.3 kW

R14

D80

D81

D82

R80

0 W

R81

0 W

R82

0 W

VRAM

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