ADLINK PXIS-2630 Series User Manual

Page 33

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Pin Assignments

27

General Peripheral Slot (Slot #3~#6) P2 Pin Assignment

Pin Z

A

B

C

D

E

F

22

GND

PXI_BRSVA22 PXI_BRSVB22 PXI_BRSVC22 PXI_BRSVD22 PXI_BRSVE22 GND

21

GND

PXI_LBR0 GND PXI_LBR1

PXI_LBR2

PXI_LBR3

GND

20

GND

PXI_LBR4

PXI_LBR5

PXI_LBL0 GND PXI_LBL1

GND

19

GND

PXI_LBL2 GND PXI_LBL3

PXI_LBL4

PXI_LBL5

GND

18

GND

PXI_TRIG3

PXI_TRIG4

PXI_TRIG5 GND PXI_TRIG6

GND

17

GND

PXI_TRIG2 GND

N/C PXI_STAR

(2)

PXI_CLK10

GND

16

GND

PXI_TRIG1

PXI_TRIG0 N/C

GND PXI_TRIG7

GND

15

GND

PXI_BRSVA15

GND N/C

PXI_LBL6

PXI_LBR6

GND

14

GND AD[35]

AD[34]

AD[33] GND AD[32] GND

13

GND AD[38]

GND

V(I/O) AD[37] AD[36]

GND

12

GND AD[42]

AD[41]

AD[40] GND AD[39] GND

11

GND AD[45]

GND

V(I/O) AD[44] AD[43]

GND

10

GND AD[49]

AD[48]

AD[47] GND AD[46] GND

9

GND AD[52]

GND

V(I/O) AD[51] AD[50]

GND

8

GND AD[56]

AD[55]

AD[54] GND AD[53] GND

7

GND AD[59]

GND

V(I/O) AD[58] AD[57]

GND

6

GND AD[63]

AD[62]

AD[61] GND AD[60] GND

5

GND C/BE[5]#

GND

V(I/O)

C/BE[4]#

PAR64 GND

4

GND V(I/O)

PXI_BRSVB4

C/BE[7]# GND C/BE[6]#

GND

3

GND

PXI_LBR7 GND PXI_LBR8

PXI_LBR9

PXI_LBR10 GND

2

GND

PXI_LBR11

PXI_LBR12

N/C (SYS#)

PXI_LBL7

PXI_LBL8 GND

1

GND

PXI_LBL9 GND PXI_LBL10

PXI_LBL11

PXI_LBL12 GND

Pin Z

A

B

C

D

E

F

Note 1: Please refer the following table for the routing of the Bus Mastering

(REQ/GNT), IDSEL, PCI CLK, and Interrupt signals.

IDSEL

REQ#

/GNT#

PCI

CLK

PXI P1

Pin A3

PXI P1

Pin B3

PXI P1

Pin C3

PXI P1

Pin E3

Slot 1(SYS)

-

-

-

INTA#

INTB# INTC#

INTD#

Slot 2

AD31

0

6

INTD#

INTA#

INTB#

INTC#

Slot 3

AD30

1

5

INTC#

INTD#

INTA#

INTB#

Slot 4

AD29

2

1

INTB#

INTC#

INTD#

INTA#

Slot 5

AD28

3

2

INTA#

INTB#

INTC#

INTD#

Slot 6

AD27

4

3

INTD#

INTA#

INTB#

INTC#

Slot 7

AD26

5

4

INTC#

INTD#

INTA#

INTB#

Slot 8

AD25

6

0

INTB#

INTC#

INTB#

INTA#

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