ADLINK PCIe-9529 - Manual (Page 38)

28 Operations
Table 3-6: ADC Filter Delay
3.6 Synchronizing Multiple Modules
The SSI (System Synchronization Interface) provides DAQ timing
synchronization between multiple cards, with a bidirectional SSI
I/O providing flexible connection between cards and allowing a
single SSI master to output the signal to other slave modules. SSI
signals are designed for card synchronization only, not external
devices. All SSI signals are routed to the CN4 connector and the
eight interconnected lines on the CN4, labeled SSI Bus [0:7] pro-
vide a flexible interface for synching multiple modules with the
requirement of cabling. The PCIe-9529 utilizes the SSI Bus [0:7]
as a System Synchronization Interface (SSI). Dedicate routing of
timebase clock and trigger signals onto the SSI Bus enables the
PCIe-9529 to simplify synchronization between multiple modules.
The bidirectional SSI I/O provides flexible connection between
modules, allowing the single SSI master PCIe-9529 to output the
SSI signals to other slave modules. SSI timing signals and func-
tions are as shown, as is the SSI architecture.
Table 3-7: SSI Timing Signal Definitions
108 K-192 kS/s 5
SSI Timing Signal Functionality
SSI_TIMEBASE
SSI master: issues TIMEBASE
SSI slave: accepts SSI_TIMEBASE to replace
the internal TIMEBASE signal.
SSI_SYNC_START
SSI master: issues internal SYNC_START
SSI slave: accepts SSI_SYNC_START as the
digital trigger signal.
SSI_AD_TRIG
SSI master: issues internal AD_TRIG
SSI slave: accepts SSI_AD_TRIG as the digital
trigger signal.
Update Rate (kS/s) Filter Delay (samples)